A digital delta-sigma modulator encodes a digital signal on a small number of levels, and at a sampling frequency that is much greater than the bandwidth of the signal to be encoded. The particular feature of such an encoder is its transfer function with respect to the quantization noise, which pushes the latter back out of the bandwidth of the signal. Thus, by a suitable filtering, the signal-to-noise ratio in the bandwidth is greatly improved with respect to conventional over-samplers.
A conventional delta-sigma digital modulator comprises an input for receiving digital data sampled on N bits, and an output which delivers a digital sampled value (quantized) on n bits, with n being less than N (e.g., equal to). A loop filter is connected to the input and allows filtering and shaping of the quantization noise. A quantizer on n bits is connected to the output, and looped back to the loop filter.
Conventionally, a digital loop filter of a delta-sigma modulator is generally made up of adders and registers (flip-flops) which are regulated by a clock signal. The number of registers fixes the order of the modulator, and hence the precision of the encoding of the signal. Between two registers, in the course of a period of the clock signal, a calculation on digital values is performed which is principally additions.
In a circuit which uses coding of two's complement numbers, the carry propagation time is dependent on the number of bits of the signal. This rapidly becomes incompatible with a high clock frequency.
One approach includes using a redundant arithmetic for coding the data. That is, a coding in which the same value may be coded in various ways. Several redundant arithmetic codings exist. For example, reference may be made to the coding of the negative carry conservation type, better known to the person skilled in the art by the name borrow-save (BS), in which each bit of the signal is represented by a coding on three values which are −1, 0 and 1. Consequently 2N bits are required for a signal which is coded on N bits in 2's complement.
The advantage of using a redundant arithmetic such as this lies in the fact that there is no longer any carry propagation during addition. The addition may therefore be done in a constant time independently of the number of bits. However, the calculation of the quantization still requires a carry propagation. This still proves to be incompatible with a high frequency clock signal.
One approach then includes using a nonexact quantization of the output. More precisely, whereas in an exact quantization, the quantization uses all the bits of the signal that is present at the input of the quantization to determine the quantized output signal. In a nonexact quantization, only part of the bits of the signal that is present at the input of the quantization is used to perform the quantization. Such an approach is described, for example, in the article by Hossack and Sewell titled “The Application of Redundant Number Systems to Digital Sigma-Delta Modulators”, pages 481 to 484, ISCAS, 1994.
However, whereas such an approach using a redundant arithmetic and a nonexact quantization of the output reduces the carry propagation time in the quantization calculation, this reduced calculation time admittedly makes it possible to operate at higher frequencies, but still proves to be incompatible for very high clock signal frequencies, such as those used in radio frequency applications, for example.